Computing systems are being developed with faster processors to increase the speed with which the computer is able to execute increasingly complex applications for business, personal use, and entertainment. The constantly increasing speed of the processors places more rigorous performance demands on all of the other subsystems in the computer. This is true of the memory subsystem in particular, where data is stored, accessed, and updated countless times during the operation of a software application.
The memory subsystem of most computers is normally operated by a memory controller. The task of a memory controller is to move data between the computer's memory subsystem and its one or more processors as quickly and efficiently as possible. The time consumed by memory read/write operations is a major factor in the ultimate speed and efficiency of a computer system. A computer's memory subsystem often comprises memory devices that employ different technologies, such as static RAM (SRAM) and dynamic RAM (DRAM). Dynamic RAM is slower because the access time for reading from and writing to a memory cell is longer than that of a SRAM device. Static RAM is often used for the cache memory where data used repeatedly by program operations is stored for fast read/write operations. The task of the memory controller is to optimize the bandwidth of the memory subsystem; that is, the controller must maximize the amount of data that the computer memory can process in read/write operations during program operations.
Where the controller must directly handle the data exchanges with the memory subsystem its task is difficult because of the overhead in time and task execution that it must carry. If some of that load could be passed to another part of the memory subsystem, more efficient data access and storage would be possible.
In the description that follows, all references to RAM include any form of read/write random access memory.